1304 search results - page 236 / 261 » Evaluating Hardware Compilation Techniques |
CHES
2004
Springer
14 years 1 months ago
2004
Springer
Since their publication in 1998, power analysis attacks have attracted signiļ¬cant attention within the cryptographic community. So far, they have been successfully applied to diļ...
GG
2004
Springer
14 years 1 months ago
2004
Springer
Model checking is increasingly popular for hardware and, more recently, software veriļ¬cation. In this paper we describe two different approaches to extend the beneļ¬ts of model ...
DFT
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
SPAA
2003
ACM
14 years 29 days ago
2003
ACM
Recent research on processor microarchitecture suggests using instruction criticality as a metric to guide hardware control policies. Fields et al. [3, 4] have proposed a directed...
IEEEPACT
2002
IEEE
14 years 19 days ago
2002
IEEE
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...