1304 search results - page 237 / 261 » Evaluating Hardware Compilation Techniques |
HCW
1999
IEEE
14 years 15 hour ago
1999
IEEE
A framework for task assignment in heterogeneous computing systems is presented in this work. The framework is based on a learning automata model. The proposed model can be used f...
HPCA
1999
IEEE
14 years 14 hour ago
1999
IEEE
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
HPCA
1999
IEEE
14 years 14 hour ago
1999
IEEE
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
ASPLOS
1998
ACM
13 years 12 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
CF
2007
ACM
13 years 11 months ago
2007
ACM
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...