1304 search results - page 238 / 261 » Evaluating Hardware Compilation Techniques |
CBSE
2006
Springer
13 years 11 months ago
2006
Springer
Designing architectures requires the balancing of multiple system quality objectives. In this paper, we present techniques that support the exploration of the quality properties of...
EEE
2004
IEEE
13 years 11 months ago
2004
IEEE
Online (Web-based) examination is an effective solution for mass education evaluation. However, due to the incomplete of network security, students can communicate with each other...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
DAC
2006
ACM
13 years 11 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
DAMON
2006
Springer
13 years 11 months ago
2006
Springer
The goal of this work is to gain insight into whether processingin-memory (PIM) technology can be used to accelerate the performance of link discovery algorithms, which represent ...