1304 search results - page 37 / 261 » Evaluating Hardware Compilation Techniques |
FPGA
2010
ACM
13 years 9 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
RTS
2010
13 years 7 months ago
2010
The current practice to design software for real-time systems is tedious. There is almost no tool support that assists the designer in automatically deriving safe bounds of the wor...
APSEC
2008
IEEE
14 years 3 months ago
2008
IEEE
There is a growing trend to deploy web services in pervasive computing environments. Implementing web services on networked, embedded devices leads to a set of challenges, includi...
MICRO
1994
IEEE
14 years 1 months ago
1994
IEEE
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
FCCM
2002
IEEE
14 years 1 months ago
2002
IEEE
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...