1304 search results - page 51 / 261 » Evaluating Hardware Compilation Techniques |
ASPLOS
1998
ACM
14 years 2 months ago
1998
ACM
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
The Opie Project aims to develop a compiler to transform C codes written for row-major matrix representation into equivalent codes for Morton-order matrix representation, and to a...
CGO
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract—Multicore systems have not only become ubiquitous in the desktop and server worlds, but are also becoming the standard in the embedded space. Multicore offers programabi...
LCTRTS
2009
Springer
14 years 4 months ago
2009
Springer
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
QEST
2010
IEEE
13 years 8 months ago
2010
IEEE
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...