We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
— Sensing events from dynamic environments are normally asynchronous and non-repeatable. This lack of repeatability makes it particularly difficult to statistically evaluate the...
Liqian Luo, Tian He, Gang Zhou, Lin Gu, Tarek F. A...
Communication characterization of parallel applications is essential to understand the interplay between architectures and applications in determining the maximum achievable perfo...
Wireless multihop ad hoc networks face a multitude of challenging problems including highly dynamic multihop topologies, lossy and noisy communications channels, and sporadic conne...
Alvin C. Valera, Hwee-Pink Tan, Winston Khoon Guan...
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...