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2007
IEEE

AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs

14 years 11 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to take advantage of optimisations available in the software compiler flow, and also to provide freedom to the low-level synthesiser, to explore options for application-specific implementations. Two operations become possible -- reuse of computational resources across different modules in the design, and generation of an application-specific memory subsystem for faster data accesses. AHIR presents a decoupled view of the program, in terms of control flow, data flow and memory accesses. Each module in AHIR is a triplet consisting of a control-path, datapath and a symbolic association between the two. Memory is represented only by load-store operators, while the memory subsystem is separately designed by the implementor. In the program-to-hardware flow, a module in AHIR corresponds to a function in C. A complete pr...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma
Added 30 Nov 2009
Updated 30 Nov 2009
Type Conference
Year 2007
Where VLSID
Authors Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Madhav P. Desai
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