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ASAP
2006
IEEE
111views Hardware» more  ASAP 2006»
14 years 2 months ago
Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
Yedidya Hilewitz, Ruby B. Lee
WSC
2008
13 years 11 months ago
Parallel simulation of the global epidemiology of Avian Influenza
SEARUMS is an Eco-modeling, bio-simulation, and analysis environment to study the global epidemiology of Avian Influenza. Originally developed in Java, SEARUMS enables comprehensi...
Dhananjai Madhava Rao, Alexander Chernyakhovsky
ANSS
2003
IEEE
14 years 2 months ago
Multicast Routing Simulator over MPLS Networks
Multicast and MPLS are two complementary technologies. Merging these two technologies where multicast trees are constructed over MPLS networks will enhance performance and present...
Ali Boudani, Bernard Cousin, Chadi Jawhar, Mahmoud...
WSC
1997
13 years 10 months ago
Integrating Distributed Simulation Objects
Creating comprehensive simulation models can be expensive and time consuming. This paper discusses our efforts to develop a general methodology that will allow users to quickly an...
Joseph A. Heim
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
14 years 2 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...