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» Evaluating Run-Time Techniques for Leakage Power Reduction
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ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 4 months ago
Optimizing the Thermal Behavior of Subarrayed Data Caches
Designing temperature-aware microarchitectures for microprocessors at new technologies is becoming a critical requirement due to the exponentially increasing on-chip power density...
Johnsy K. John, Jie S. Hu, Sotirios G. Ziavras
ACNS
2009
Springer
150views Cryptology» more  ACNS 2009»
13 years 11 months ago
How to Compare Profiled Side-Channel Attacks?
Side-channel attacks are an important class of attacks against cryptographic devices and profiled side-channel attacks are the most powerful type of side-channel attacks. In this s...
François-Xavier Standaert, François ...
SODA
2008
ACM
144views Algorithms» more  SODA 2008»
13 years 9 months ago
Fast dimension reduction using Rademacher series on dual BCH codes
The Fast Johnson-Lindenstrauss Transform (FJLT) was recently discovered by Ailon and Chazelle as a novel technique for performing fast dimension reduction with small distortion fr...
Nir Ailon, Edo Liberty
ICCAD
2007
IEEE
124views Hardware» more  ICCAD 2007»
14 years 4 months ago
3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits
Abstract— Thermal issues are a primary concern in the threedimensional (3D) integrated circuit (IC) design. Temperature, area, and wire length must be simultaneously optimized du...
Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. ...
CCGRID
2007
IEEE
14 years 2 months ago
Performance Evaluation in Grid Computing: A Modeling and Prediction Perspective
Experimental performance studies on computer systems, including Grids, require deep understandings on their workload characteristics. The need arises from two important and closel...
Hui Li