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» Evaluating Run-Time Techniques for Leakage Power Reduction
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ISLPED
1995
ACM
131views Hardware» more  ISLPED 1995»
13 years 11 months ago
Guarded evaluation: pushing power management to logic synthesis/design
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
Vivek Tiwari, Sharad Malik, Pranav Ashar
ASIACRYPT
2005
Springer
14 years 1 months ago
Gate Evaluation Secret Sharing and Secure One-Round Two-Party Computation
We propose Gate Evaluation Secret Sharing (GESS) – a new kind of secret sharing, designed for use in secure function evaluation (SFE) with minimal interaction. The resulting simp...
Vladimir Kolesnikov
MOBICOM
1996
ACM
13 years 11 months ago
Reducing Processor Power Consumption by Improving Processor Time Management in a Single-user Operating System
The CPU is one of the major power consumers in a portable computer, and considerable power can be saved by turning off the CPU when it is not doing useful work. In Apple's Ma...
Jacob R. Lorch, Alan Jay Smith
ICCAD
1994
IEEE
144views Hardware» more  ICCAD 1994»
13 years 11 months ago
Power analysis of embedded software: a first step towards software power minimization
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical com...
Vivek Tiwari, Sharad Malik, Andrew Wolfe
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
14 years 16 days ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu