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» Evaluating Software Architectures for Usability
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119
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DAC
1999
ACM
15 years 7 months ago
Microprocessor Based Testing for Core-Based System on Chip
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC. The novel feature of the approach is the use an embedde...
Christos A. Papachristou, F. Martin, Mehrdad Noura...
ERSA
2008
103views Hardware» more  ERSA 2008»
15 years 4 months ago
A Hardware Accelerator for k-th Nearest Neighbor Thinning
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
Tobias Schumacher, Robert Meiche, Paul Kaufmann, E...
135
Voted
COMSWARE
2006
IEEE
15 years 7 months ago
Architecting protocol stack optimizations on mobile devices
Applications using traditional protocol stacks (e.g TCP/IP) from wired networks do not function efficiently in mobile wireless scenarios. This is primarily due to the layered archi...
Vijay T. Raisinghani, Sridhar Iyer
HPCA
2002
IEEE
16 years 3 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
108
Voted
ECIS
2004
15 years 4 months ago
Security and privacy in a structured information network
The lack of trust amongst consumers and concerns about disclosing personal information are commonly seen as a major impediment to the growth of e-commerce. This is a consequence o...
Tuomas Valtonen, Tero Reuna, Kalle Luhtinen