417 search results - page 14 / 84 » Evaluating kilo-instruction multiprocessors |
SC
1995
ACM
13 years 11 months ago
1995
ACM
In this paper we present an analytical-based framework for parallel program performance prediction. The main thrust of this work is to provide a means for treating realistic appli...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
JSA
2000
13 years 7 months ago
2000
This paper presents an efficient routing and flow control mechanism to implement multidestination message passing in wormhole networks.It is targeted to situations where the size ...
CAL
2010
13 years 4 months ago
2010
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Translation Lookaside Buffers (TLBs) are critical to processor performance. Much past research has addressed uniprocessor TLBs, lowering access times and miss rates. However, as c...