417 search results - page 21 / 84 » Evaluating kilo-instruction multiprocessors |
IPPS
1997
IEEE
13 years 11 months ago
1997
IEEE
Inthispaper, anewparallel processingsystemforcommercial applications, so called SPAX, is described. SPAX cost-effectively overcomes the SMP limitation by providing scalabilityof t...
ICCD
1994
IEEE
13 years 11 months ago
1994
IEEE
Dynamically tagged directories are memory-efficient mechanisms for maintaining cache coherence in sharedmemory multiprocessors. These directories use specialpurpose caches of poin...
ASPLOS
1991
ACM
13 years 11 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
CCGRID
2008
IEEE
13 years 9 months ago
2008
IEEE
In this article, we revisit the problem of scheduling dynamically generated directed acyclic graphs (DAGs) of multi-processor tasks (M-tasks). A DAG is a basic model for expressin...
CDES
2008
13 years 9 months ago
2008
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...