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» Evaluating kilo-instruction multiprocessors
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DLOG
2010
13 years 5 months ago
TBox Classification in Parallel: Design and First Evaluation
Abstract. One of the most frequently used inference services of description logic reasoners classifies all named classes of OWL ontologies into a subsumption hierarchy. Due to emer...
Mina Aslani, Volker Haarslev
ISPASS
2005
IEEE
14 years 1 months ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...
HPCC
2005
Springer
14 years 1 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
SAMOS
2007
Springer
14 years 1 months ago
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing
The computational demand of signal processing algorithms is rising continuously. Heterogeneous embedded multiprocessor systems-on-chips are one solution to tackle this demand. But ...
Bastian Ristau, Gerhard Fettweis
IPPS
1997
IEEE
13 years 11 months ago
Performance Comparison of Processor Scheduling Strategies in a Distributed-Memory Multicomputer System
Abstract — Processor scheduling has received considerable attention in the context of shared-memory multiprocessor systems but has not received as much attention in distributed-m...
Yuet-Ning Chan, Sivarama P. Dandamudi, Shikharesh ...