417 search results - page 79 / 84 » Evaluating kilo-instruction multiprocessors |
ISPASS
2005
IEEE
14 years 1 months ago
2005
IEEE
Communication misses--those serviced by dirty data in remote caches--are a pressing performance limiter in shared-memory multiprocessors. Recent research has indicated that tempor...
LCN
2000
IEEE
13 years 12 months ago
2000
IEEE
Performance evaluation and reliability prediction are two important factors in the study of multiprocessor and cluster interconnects. One such interconnect is the Scalable Coheren...
ICDE
2006
IEEE
14 years 8 months ago
2006
IEEE
The rapid increase in the data volumes for the past few decades has intensified the need for high processing power for database and data mining applications. Researchers have acti...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...