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ICCD
2006
IEEE
137views Hardware» more  ICCD 2006»
14 years 4 months ago
Implementation and Evaluation of On-Chip Network Architectures
— Driven by the need for higher bandwidth and complexity reduction, off-chip interconnect has evolved from proprietary busses to networked architectures. A similar evolution is o...
Paul Gratz, Changkyu Kim, Robert G. McDonald, Step...
ANCS
2009
ACM
13 years 5 months ago
Motivating future interconnects: a differential measurement analysis of PCI latency
Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and ...
David J. Miller, Philip M. Watts, Andrew W. Moore
TJS
2002
118views more  TJS 2002»
13 years 7 months ago
The MAGNeT Toolkit: Design, Implementation and Evaluation
Abstract-The current trend in constructing high-performance computing systems is to connect a large number of machines via a fast interconnect or a large-scale network such as the ...
Wu-chun Feng, Mark K. Gardner, Jeffrey R. Hay
ISVLSI
2005
IEEE
80views VLSI» more  ISVLSI 2005»
14 years 1 months ago
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs
Mesh interconnect can be efficiently utilized while tree networks encourage the short routing distances. In this paper, we present the property analysis of a cluster-based interc...
Renqiu Huang, Ranga Vemuri
IPPS
1992
IEEE
13 years 11 months ago
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension
This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent c...
Matthew K. Farrens, Arvin Park, Allison Woodruff