Workstation clusters equipped with high performance interconnect having programmable network processors facilitate interesting opportunities to enhance the performance of parallel...
V. Santhosh Kumar, Matthew J. Thazhuthaveetil, R. ...
It is well known that the performance of a program can often be improved by means of program transformation. Several program transformation techniques, eg. partial evaluation, wor...
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
This paper presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming e...
We have designed a maximum likelihood fitter using the actor model to distribute the computation over a heterogeneous network. The prototype implementation uses the SALSA program...
Wei-Jen Wang, Kaoutar El Maghraoui, John Cummings,...