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FCCM
2008
IEEE
165views VLSI» more  FCCM 2008»
14 years 1 months ago
Performance Analysis with High-Level Languages for High-Performance Reconfigurable Computing
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
John Curreri, Seth Koehler, Brian Holland, Alan D....
ISHPC
2003
Springer
14 years 16 days ago
Evaluating Heuristic Scheduling Algorithms for High Performance Parallel Processing
Most cluster systems used in high performance computing do not allow process relocation at run-time. Finding an allocation that results in minimal completion time is NP-hard and (n...
Lars Lundberg, Magnus Broberg, Kamilla Klonowska
CLUSTER
2008
IEEE
13 years 7 months ago
Performance prediction with skeletons
The performance skeleton of an application is a short running program whose performance in any scenario reflects the performance of the application it represents. Specifically, th...
Sukhdeep Sodhi, Jaspal Subhlok, Qiang Xu
PDCAT
2007
Springer
14 years 1 months ago
Realistic Evaluation of Interconnection Network Performance at High Loads
Any simulation-based evaluation of an interconnection network proposal requires a good characterization of the workload. Synthetic traffic patterns based on independent traffic so...
Francisco Javier Ridruejo Perez, Javier Navaridas,...
IPPS
2000
IEEE
13 years 11 months ago
Controlling Distributed Shared Memory Consistency from High Level Programming Languages
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
Yvon Jégou