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ISCA
1994
IEEE
117views Hardware» more  ISCA 1994»
14 years 1 months ago
Evaluating Stream Buffers as a Secondary Cache Replacement
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
Subbarao Palacharla, Richard E. Kessler
LCTRTS
2007
Springer
14 years 3 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
HPCA
2003
IEEE
14 years 10 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
XSYM
2009
Springer
139views Database» more  XSYM 2009»
14 years 4 months ago
A Data Parallel Algorithm for XML DOM Parsing
Abstract. The extensible markup language XML has become the de facto standard for information representation and interchange on the Internet. XML parsing is a core operation perfor...
Bhavik Shah, Praveen Rao, Bongki Moon, Mohan Rajag...
IPPS
2007
IEEE
14 years 4 months ago
A Design and Analysis of a Hybrid Multicast Transport Protocol for the Haptic Virtual Reality Tracheotomy Tele-Surgery Applicati
Nowadays, distributed collaborative virtual environments are used in many scenarios such as tele-surgery, gaming, and industrial training, However several challenging issues remai...
Azzedine Boukerche, Haifa Maamar, Abuhoss Hossain