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» Evaluating the Performance of Software Cache Coherence
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ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 1 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
ISPASS
2009
IEEE
14 years 2 months ago
Accurately approximating superscalar processor performance from traces
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
Kiyeon Lee, Shayne Evans, Sangyeun Cho
CGO
2006
IEEE
14 years 1 months ago
Thread-Shared Software Code Caches
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
Derek Bruening, Vladimir Kiriansky, Timothy Garnet...
IPPS
2010
IEEE
13 years 4 months ago
Clustering JVMs with software transactional memory support
Affordable transparent clustering solutions to scale non-HPC applications on commodity clusters (such as Terracotta) are emerging for Java Virtual Machines (JVMs). Working in this ...
Christos Kotselidis, Mikel Luján, Mohammad ...
IWNAS
2008
IEEE
14 years 1 months ago
Software Barrier Performance on Dual Quad-Core Opterons
Multi-core processors based SMP servers have become building blocks for Linux clusters in recent years because they can deliver better performance for multi-threaded programs thro...
Jie Chen, William A. Watson III