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» Evaluation of CORDIC Algorithms for FPGA Design
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SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
14 years 28 days ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
ERSA
2008
93views Hardware» more  ERSA 2008»
13 years 8 months ago
Multiparadigm Computing for Space-Based Synthetic Aperture Radar
Projected computational requirements for future space missions are outpacing technologies and trends in conventional embedded microprocessors. In order to meet the necessary levels...
Adam Jacobs, Grzegorz Cieslewski, Casey Reardon, A...
CONEXT
2009
ACM
13 years 8 months ago
SafeGuard: safe forwarding during route changes
This paper presents the design and evaluation of SafeGuard, an intra-domain routing system that can safely forward packets to their destinations even when routes are changing. Saf...
Ang Li, Xiaowei Yang, David Wetherall
DAC
2005
ACM
14 years 8 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
FCCM
2007
IEEE
115views VLSI» more  FCCM 2007»
14 years 1 months ago
Generating FPGA-Accelerated DFT Libraries
We present a domain-specific approach to generate highperformance hardware-software partitioned implementations of the discrete Fourier transform (DFT) in fixed point precision....
Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryh...