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» Evaluation of CORDIC Algorithms for FPGA Design
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FPL
2004
Springer
103views Hardware» more  FPL 2004»
14 years 23 days ago
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation ...
Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne L...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 7 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
FPGA
2004
ACM
120views FPGA» more  FPGA 2004»
14 years 23 days ago
Flexibility measurement of domain-specific reconfigurable hardware
Traditional metrics used to compare hardware designs include area, performance, and power. However, these metrics do not form a complete evaluation of reconfigurable hardware. For...
Katherine Compton, Scott Hauck
FPGA
2007
ACM
163views FPGA» more  FPGA 2007»
14 years 1 months ago
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
Jason Cong, Kirill Minkovich
ICPR
2008
IEEE
14 years 1 months ago
Real-time accurate optical flow-based motion sensor
An accurate real-time motion sensor implemented in an FPGA is introduced in this paper. This sensor applies an optical flow algorithm based on ridge regression to solve the collin...
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K....