Sciweavers

40 search results - page 4 / 8
» Evaluation of a High-Level-Language Methodology for High-Per...
Sort
View
FPGA
2000
ACM
168views FPGA» more  FPGA 2000»
13 years 10 months ago
A benchmark suite for evaluating configurable computing systems--status, reflections, and future directions
This paper presents a benchmark suite for evaluating a configurable computing system's infrastructure, both tools and architecture. A novel aspect of this work is the use of ...
S. Kumar, Luiz Pires, Subburajan Ponnuswamy, C. Na...
ERSA
2006
111views Hardware» more  ERSA 2006»
13 years 8 months ago
Promises and Pitfalls of Reconfigurable Supercomputing
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
Maya Gokhale, Christopher Rickett, Justin L. Tripp...
FDL
2004
IEEE
13 years 10 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
SBCCI
2003
ACM
129views VLSI» more  SBCCI 2003»
13 years 12 months ago
Hyperspectral Images Clustering on Reconfigurable Hardware Using the K-Means Algorithm
Unsupervised clustering is a powerful technique for understanding multispectral and hyperspectral images, being k-means one of the most used iterative approaches. It is a simple th...
Abel Guilhermino S. Filho, Alejandro César ...
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
13 years 10 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...