253 search results - page 16 / 51 » Event-driven processor power management |
ACMMSP
2006
ACM
14 years 1 months ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
EUROSYS
2006
ACM
14 years 4 months ago
2006
ACM
Actions usually taken to prevent processors from overheating, such as decreasing the frequency or stopping the execution flow, also degrade performance. Multiprocessor systems, h...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
ASPLOS
2000
ACM
14 years 3 days ago
2000
ACM
One of the major challenges of post-PC computing is the need to reduce energy consumption, thereby extending the lifetime of the batteries that power these mobile devices. Memory ...