469 search results - page 8 / 94 » Evolutionary Approach to Test Generation for Functional BIST |
GECCO
2005
Springer
14 years 1 months ago
2005
Springer
As the paradigm of object orientation becomes more and more important for modern IT development projects, the demand for an automated test case generation to dynamically test obje...
ET
2007
13 years 7 months ago
2007
Abstract In order to perform an on-chip test for characterizing both static and transmission parameters of embedded analog-to-digital converters (ADCs), this paper presents an osci...
ITC
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
MTDT
2003
IEEE
14 years 28 days ago
2003
IEEE
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
VLSID
2005
IEEE
14 years 1 months ago
2005
IEEE
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...