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» Evolutionary algorithms and dynamic programming
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ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
12 years 2 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang
NAACL
2003
13 years 8 months ago
TIPS: A Translingual Information Processing System
Searching online information is increasingly a daily activity for many people. The multilinguality of online content is also increasing (e.g. the proportion of English web users, ...
Yaser Al-Onaizan, Radu Florian, Martin Franz, Hany...