92 search results - page 10 / 19 » Evolutionary-Reduced Ordered Binary Decision Diagram |
ISQED
2002
IEEE
14 years 2 months ago
2002
IEEE
State-of-the-art verification tools are based on efficient operations on Boolean formulas. Traditional manipulation techniques are based on Binary Decision Diagrams (BDDs) and SAT...
ICCD
1995
IEEE
14 years 1 months ago
1995
IEEE
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
FMSD
2007
13 years 9 months ago
2007
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
CHARME
2001
Springer
14 years 1 months ago
2001
Springer
Model checking is the process of verifying whether a model of a concurrent system satisfies a specified temporal property. Symbolic algorithms based on Binary Decision Diagrams (BD...
ISSTA
1998
ACM
14 years 1 months ago
1998
ACM
We present various techniques for improving the time and space efficiency of symbolic model checking for system requirements specified as synchronous finite state machines. We use...