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ITCC
2005
IEEE
14 years 1 months ago
Pareto-Optimal Hardware for Substitution Boxes
: In this paper, we propose a methodology based on genetic programming to automatically generate hardware designs of substitution boxes necessary for many cryptosystems such as DES...
Nadia Nedjah, Luiza de Macedo Mourelle
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
14 years 5 days ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
EH
1999
IEEE
141views Hardware» more  EH 1999»
14 years 5 days ago
On-Line Evolution of FPGA-Based Circuits: A Case Study on Hash Functions
An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16bit address space into an 8-bit one. The target technology is FPGA,...
Ernesto Damiani, Andrea Tettamanzi, Valentino Libe...
FCCM
2005
IEEE
124views VLSI» more  FCCM 2005»
14 years 1 months ago
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
Arash Hariri, Reza Rastegar, Morteza Saheb Zamani,...
AHS
2007
IEEE
253views Hardware» more  AHS 2007»
14 years 2 months ago
evolFIR: Evolving redundancy-free FIR structures
Finite impulse response (FIR) structures are the most commonly used digital filters and can be found in various areas of everyday life. In this paper we introduce a novel approac...
Szilvia Zvada, Gabriella Kókai, Róbe...