115 search results - page 14 / 23 » Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs |
FCCM
2008
IEEE
14 years 2 months ago
2008
IEEE
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
CSREAESA
2009
13 years 8 months ago
2009
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
EH
1999
IEEE
14 years 1 days ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
CODES
2009
IEEE
13 years 11 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
ARC
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...