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» Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
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FPL
2008
Springer
138views Hardware» more  FPL 2008»
13 years 9 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...
ICES
2003
Springer
93views Hardware» more  ICES 2003»
14 years 28 days ago
A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs
Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of tra...
Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMar...
IPPS
2007
IEEE
14 years 2 months ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...
TC
2008
13 years 7 months ago
High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware
Numerical linear algebra operations are key primitives in scientific computing. Performance optimizations of such operations have been extensively investigated. With the rapid adva...
Ling Zhuo, Viktor K. Prasanna
JIRS
2007
108views more  JIRS 2007»
13 years 7 months ago
Task-based Hardware Reconfiguration in Mobile Robots Using FPGAs
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
Sesh Commuri, V. Tadigotla, L. Sliger