Sciweavers

521 search results - page 28 / 105
» Executing Hardware as Parallel Software for Picoblaze Networ...
Sort
View
TPDS
2010
174views more  TPDS 2010»
13 years 5 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
DATE
2002
IEEE
115views Hardware» more  DATE 2002»
14 years 11 days ago
Design Technology for Networked Reconfigurable FPGA Platforms
Future networked appliances should be able to download new services or upgrades from the network and execute them locally. This flexibility is typically achieved by processors tha...
Steve Guccione, Diederik Verkest, Ivo Bolsens
IEEEPACT
2003
IEEE
14 years 21 days ago
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation
In Thread-Level Speculation (TLS), speculative tasks generate memory state that cannot simply be combined with the rest of the system because it is unsafe. One way to deal with th...
María Jesús Garzarán, Milos P...
IPPS
1996
IEEE
13 years 11 months ago
Software Support for Virtual Memory-Mapped Communication
Virtual memory-mapped communication (VMMC) is a communication model providing direct data transfer between the sender's and receiver's virtual address spaces. This model...
Cezary Dubnicki, Liviu Iftode, Edward W. Felten, K...
MMM
2005
Springer
136views Multimedia» more  MMM 2005»
14 years 1 months ago
Gigabit Ethernet-Based Parallel Video Processing
This paper describes solutions for parallel video processing based on LAN-connected PC-like workstations. We outline application scenarios for the processing of video with broadca...
Horst Eidenberger