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IPPS
1994
IEEE
14 years 20 days ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
14 years 23 days ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
IPSN
2007
Springer
14 years 2 months ago
Harbor: software-based memory protection for sensor nodes
Many sensor nodes contain resource constrained microcontrollers where user level applications, operating system components, and device drivers share a single address space with no...
Ram Kumar, Eddie Kohler, Mani B. Srivastava
SENSYS
2006
ACM
14 years 2 months ago
Supporting concurrent applications in wireless sensor networks
It is vital to support concurrent applications sharing a wireless sensor network in order to reduce the deployment and administrative costs, thus increasing the usability and efï¬...
Yang Yu, Loren J. Rittle, Vartika Bhandari, Jason ...