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ISCA
2005
IEEE
181views Hardware» more  ISCA 2005»
14 years 3 months ago
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
Evan Speight, Hazim Shafi, Lixin Zhang, Ramakrishn...
ISPASS
2005
IEEE
14 years 3 months ago
Anatomy and Performance of SSL Processing
A wide spectrum of e-commerce (B2B/B2C), banking, financial trading and other business applications require the exchange of data to be highly secure. The Secure Sockets Layer (SSL...
Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. ...
STEP
2005
IEEE
14 years 3 months ago
Using Metamodels in Service Interoperability
Interoperability in service oriented environments is heavily inuenced by the view that the cooperating services have on their data. e term service for the abstract contract concl...
Andreas Winter, Jürgen Ebert
MOBIDE
2005
ACM
14 years 3 months ago
Recovery of mobile internet transactions: algorithm, implementation and analysis
The increasing popularity of mobile devices and the support of web portals towards performing transactions from these mobile devices has enabled business on the move. However, int...
Shashi Anand, Krithi Ramamritham
PPOPP
2005
ACM
14 years 3 months ago
Fault tolerant high performance computing by a coding approach
As the number of processors in today’s high performance computers continues to grow, the mean-time-to-failure of these computers are becoming significantly shorter than the exe...
Zizhong Chen, Graham E. Fagg, Edgar Gabriel, Julie...