453 search results - page 37 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
PAAPP
2002
13 years 9 months ago
2002
Abstract. The performance of shared-memory (OpenMP) implementations of three different PDE solver kernels representing finite difference methods, finite volume methods, and spectra...
MSS
2005
IEEE
14 years 3 months ago
2005
IEEE
We present a policy-based architecture STEPS for lifecycle management (LCM) in a mass scale distributed file system. The STEPS architecture is designed in the context of IBM’s ...
WOSP
2004
ACM
14 years 3 months ago
2004
ACM
The simulated evaluation of memory management policies relies on reference traces—logs of memory operations performed by running processes. No existing approach to reference tra...
HIPEAC
2010
Springer
13 years 11 months ago
2010
Springer
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...