453 search results - page 49 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
OSDI
2004
ACM
14 years 9 months ago
2004
ACM
Program-counter-based (PC-based) prediction techniques have been shown to be highly effective and are widely used in computer architecture design. In this paper, we explore the op...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
DAC
1998
ACM
14 years 1 months ago
1998
ACM
Networked embedded systems are expected to support adaptive streaming audio/video applications with soft real-time constraints. These systems can be designed in a cost efficient ...
ICPPW
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— Most image processing applications are characterized by computation-intensive operations, and high memory and performance requirements. Parallelized implementation on s...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...