453 search results - page 68 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
IEEEPACT
2000
IEEE
14 years 1 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
PPOPP
1993
ACM
14 years 27 days ago
1993
ACM
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
CLUSTER
2004
IEEE
14 years 17 days ago
2004
IEEE
Cluster computing environments built from commodity hardware have provided a cost-effective solution for many scientific and high-performance applications. Likewise, middleware te...
CLUSTER
2010
IEEE
13 years 13 days ago
2010
IEEE
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...