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» Experiences in Hardware Trojan Design and Implementation
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CGO
2010
IEEE
14 years 24 days ago
Contention aware execution: online contention detection and response
Cross-core application interference due to contention for shared on-chip and off-chip resources pose a significant challenge to providing application level quality of service (Qo...
Jason Mars, Neil Vachharajani, Robert Hundt, Mary ...
SC
2003
ACM
14 years 22 days ago
Identifying and Exploiting Spatial Regularity in Data Memory References
The growing processor/memory performance gap causes the performance of many codes to be limited by memory accesses. If known to exist in an application, strided memory accesses fo...
Tushar Mohan, Bronis R. de Supinski, Sally A. McKe...
CIKM
2001
Springer
14 years 5 hour ago
PowerDB-IR - Information Retrieval on Top of a Database Cluster
Our current concern is a scalable infrastructure for information retrieval (IR) with up-to-date retrieval results in the presence of frequent, continuous updates. Timely processin...
Torsten Grabs, Klemens Böhm, Hans-Jörg S...
ASPLOS
2010
ACM
13 years 10 months ago
Orthrus: efficient software integrity protection on multi-cores
This paper proposes an efficient hardware/software system that significantly enhances software security through diversified replication on multi-cores. Recent studies show that a ...
Ruirui Huang, Daniel Y. Deng, G. Edward Suh
INFOCOM
2010
IEEE
13 years 6 months ago
A Framework for Joint Network Coding and Transmission Rate Control in Wireless Networks
—Network coding has been proposed as a technique that can potentially increase the transport capacity of a wireless network via processing and mixing of data packets at intermedi...
Tae-Suk Kim, Serdar Vural, Ioannis Broustis, Dimit...