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155
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MICRO
1999
IEEE
143views Hardware» more  MICRO 1999»
15 years 7 months ago
Code Transformations to Improve Memory Parallelism
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
Vijay S. Pai, Sarita V. Adve
EUROPAR
2009
Springer
15 years 9 months ago
High Performance Matrix Multiplication on Many Cores
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zha...
106
Voted
HPDC
2006
IEEE
15 years 8 months ago
On the Harmfulness of Redundant Batch Requests
Most parallel computing resources are controlled by batch schedulers that place requests for computation in a queue until access to compute nodes is granted. Queue waiting times a...
Henri Casanova
118
Voted
ADHOCNOW
2006
Springer
15 years 8 months ago
Circularity-Based Medium Access Control in Mobile Ad Hoc Networks
Abstract. The RTS/CTS access scheme, designed to reduce the number of collisions in a IEEE 802.11 network, is known to exhibit problems due to masked nodes, the imbalance between t...
Mohammad Z. Ahmad, Damla Turgut, R. Bhakthavathsal...
163
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JSSPP
2010
Springer
15 years 20 days ago
Resource Provisioning in SLA-Based Cluster Computing
Cluster computing is excellent for parallel computation. It has become increasingly popular. In cluster computing, a service level agreement (SLA) is a set of quality of services (...
Kaiqi Xiong, Sang C. Suh