352 search results - page 51 / 71 » Experiences with Soft-Core Processor Design |
TVCG
2010
13 years 3 months ago
2010
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
ISCA
2011
IEEE
13 years 26 days ago
2011
IEEE
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
CF
2005
ACM
13 years 11 months ago
2005
ACM
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
Detecting data races in parallel programs is important for both software development and production-run diagnosis. Recently, there have been several proposals for hardware-assiste...
CF
2007
ACM
14 years 1 months ago
2007
ACM
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...