— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
— In this paper we give a theoretical model for determining the synchronization frequency that minimizes the parallel execution time of loops with uniform dependencies dynamicall...
Florina M. Ciorba, Ioannis Riakiotakis, Theodore A...
Background: Efforts to predict functional sites from globular proteins is increasingly common; however, the most successful of these methods generally require structural insight. ...
Dennis R. Livesay, Patrick D. Kidd, Sepehr Eskanda...
In parallel processing systems, a fundamental consideration is the maximization of system performance through task mapping. A good allocation strategy may improve resource utilizat...
S. Mounir Alaoui, Ophir Frieder, Tarek A. El-Ghaza...
This paper presents an extensive empirical evaluation of an interprocedural parallelizing compiler, developed as part of the Stanford SUIF compiler system. The system incorporates...
Mary W. Hall, Saman P. Amarasinghe, Brian R. Murph...