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IPPS
2007
IEEE
14 years 1 months ago
Packet Reordering in Network Processors
Network processors today consists of multiple parallel processors (microengines) with support for multiple threads to exploit packet level parallelism inherent in network workload...
S. Govind, R. Govindarajan, Joy Kuri
IPPS
2007
IEEE
14 years 1 months ago
Modeling of NAMD's Network Input/Output on Large PC Clusters
This study examined the interplay among processor speed, cluster interconnect and file I/O, using parallel applications to quantify interactions. We focused on a common case wher...
Nancy Tran, Daniel A. Reed
PPOPP
2009
ACM
14 years 8 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
ICS
2010
Tsinghua U.
13 years 6 months ago
Decomposable and responsive power models for multicore processors using performance counters
Abstract—Power modeling based on performance monitoring counters (PMCs) has attracted the interest of many researchers since it become a quick approach to understand and analyse ...
Ramon Bertran, Marc González, Xavier Martor...
IPPS
2003
IEEE
14 years 22 days ago
Modeling Parallel Applications Performance on Heterogeneous Systems
The current technologies have made it possible to execute parallel applications across heterogeneous platforms. However, the performance models available do not provide adequate m...
Jameela Al-Jaroodi, Nader Mohamed, Hong Jiang, Dav...