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» Experiments with Cost-Sensitive Feature Evaluation
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SDL
2003
147views Hardware» more  SDL 2003»
15 years 5 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
224
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PRL
2011
14 years 6 months ago
A Bayes-true data generator for evaluation of supervised and unsupervised learning methods
Benchmarking pattern recognition, machine learning and data mining methods commonly relies on real-world data sets. However, there are some disadvantages in using real-world data....
Janick V. Frasch, Aleksander Lodwich, Faisal Shafa...
143
Voted
HPDC
2002
IEEE
15 years 9 months ago
Evaluating Web Services Based Implementations of GridRPC
GridRPC is a class of Grid middleware for scientific computing. Interoperability has been an important issue, because current GridRPC systems each employ its own protocol. Web se...
Satoshi Shirasuna, Hidemoto Nakada, Satoshi Matsuo...
130
Voted
DATE
2009
IEEE
130views Hardware» more  DATE 2009»
15 years 10 months ago
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA
—IP-XACT is a standard for describing intellectual property metadata for System-on-Chip (SoC) integration. Reesearchers have proposed visualizing and abstracting IP-XACT objects ...
Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo ...
167
Voted
ICA3PP
2010
Springer
15 years 2 months ago
A New Visual Simulation Tool for Performance Evaluation of MANET Routing Protocols
A new user-friendly visual simulation tool; ViSim is presented. ViSim could be useful for researchers, students, teachers in their works, and for the demonstration of various wirel...
Md. Sabbir Rahman Sakib, Nazmus Saquib, Al-Sakib K...