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ARC
2009
Springer
241views Hardware» more  ARC 2009»
14 years 3 months ago
Fully Pipelined Hardware Implementation of 128-Bit SEED Block Cipher Algorithm
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...
Jaeyoung Yi, Karam Park, Joonseok Park, Won Woo Ro
IOLTS
2009
IEEE
231views Hardware» more  IOLTS 2009»
14 years 3 months ago
Designing fault tolerant FSM by nano-PLA
— The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault toleran...
Samary Baranov, Ilya Levin, Osnat Keren, Mark G. K...
ISORC
2009
IEEE
14 years 3 months ago
From Requirements to Code Revisited
In his article entitled "From Play-In Scenarios to Code: An Achievable Dream", David Harel presented a development schema that makes it possible to go from high-level us...
Tewfik Ziadi, Xavier Blanc, Amine Raji
RTSS
2008
IEEE
14 years 3 months ago
Hardware Runtime Monitoring for Dependable COTS-Based Real-Time Embedded Systems
COTS peripherals are heavily used in the embedded market, but their unpredictability is a threat for high-criticality real-time systems: it is hard or impossible to formally verif...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Marco...
APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
14 years 2 months ago
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-We...