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» Explaining Verification Conditions
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ASPDAC
2007
ACM
136views Hardware» more  ASPDAC 2007»
13 years 12 months ago
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
Georges G. E. Gielen
TSE
2002
94views more  TSE 2002»
13 years 7 months ago
Improving the Precision of INCA by Eliminating Solutions with Spurious Cycles
The Inequality Necessary Condition Analyzer (INCA) is a finite-state verification tool that has been able to check properties of some very large concurrent systems. INCA checks a p...
Stephen F. Siegel, George S. Avrunin
FSTTCS
2007
Springer
14 years 2 months ago
A Theory for Game Theories
Abstract. We explain a double-category (of positions and plays) attached to the theory of HOgames (those with the so-called switching condition [7]) from which the category of aren...
Michel Hirschowitz, André Hirschowitz, Tom ...
RSP
2007
IEEE
139views Control Systems» more  RSP 2007»
14 years 2 months ago
Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring, and Automatic Test Generation
This paper addresses the need for formal specification and runtime verification of system-level requirements of distributed reactive systems. It describes a formalism for specifyi...
Doron Drusinsky, Man-tak Shing
NETGAMES
2004
ACM
14 years 1 months ago
Some thoughts on emulating jitter for user experience trials
It is usually hard to control the network conditions affecting public online game servers when studying the impact of latency, loss and jitter on user experience. This leads to a ...
Grenville J. Armitage, Lawrence Stewart