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SAMOS
2004
Springer
14 years 1 months ago
Scalable Instruction-Level Parallelism.
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
Chris R. Jesshope
BMCBI
2008
80views more  BMCBI 2008»
13 years 8 months ago
Computational evaluation of TIS annotation for prokaryotic genomes
Background: Accurate annotation of translation initiation sites (TISs) is essential for understanding the translation initiation mechanism. However, the reliability of TIS annotat...
Gang-Qing Hu, Xiaobin Zheng, Li-Ning Ju, Huaiqiu Z...
PVLDB
2010
151views more  PVLDB 2010»
13 years 7 months ago
Scalable Discovery of Best Clusters on Large Graphs
The identification of clusters, well-connected components in a graph, is useful in many applications from biological function prediction to social community detection. However, ...
Kathy Macropol, Ambuj K. Singh
CODES
2008
IEEE
14 years 3 months ago
Online adaptive utilization control for real-time embedded multiprocessor systems
To provide Quality of Service (QoS) guarantees in open and unpredictable environments, the utilization control problem is defined to keep the processor utilization at the schedula...
Jianguo Yao, Xue Liu, Mingxuan Yuan, Zonghua Gu
NIPS
2004
13 years 10 months ago
Dynamic Bayesian Networks for Brain-Computer Interfaces
We describe an approach to building brain-computer interfaces (BCI) based on graphical models for probabilistic inference and learning. We show how a dynamic Bayesian network (DBN...
Pradeep Shenoy, Rajesh P. N. Rao