Sciweavers

40 search results - page 7 / 8
» Exploiting Contemporary Memory Techniques in Reconfigurable ...
Sort
View
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
14 years 1 months ago
A low complexity hardware architecture for motion estimation
This paper tackles the problem of accelerating The rest of this paper is organised as follows: section II motion estimation for video processing. A novel architecture details relat...
Daniel Larkin, Vlenti. Muresan, Noel E. O'Connor
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
14 years 18 days ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
ISBI
2007
IEEE
14 years 1 months ago
Real-Time Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor
Emerging multi-core processors are able to accelerate medical imaging applications by exploiting the parallelism available in their algorithms. We have implemented a mutual-inform...
Moriyoshi Ohara, Hangu Yeo, Frank Savino, Giridhar...
SIGMOD
2007
ACM
232views Database» more  SIGMOD 2007»
14 years 7 months ago
BLINKS: ranked keyword searches on graphs
Query processing over graph-structured data is enjoying a growing number of applications. Keyword search on a graph finds a set of answers, each of which is a substructure of the ...
Haixun Wang, Hao He, Jun Yang 0001, Philip S. Yu
ASPLOS
2011
ACM
12 years 11 months ago
Inter-core prefetching for multicore processors using migrating helper threads
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen