33 search results - page 6 / 7 » Exploiting FPGA Concurrency to Enhance JVM Performance |
177
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INFOCOM
2009
IEEE
16 years 18 days ago
2009
IEEE
—Network protocols have traditionally been designed using a layered method in part because it is easier to implement some portions of network protocols in software and other port...
194
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CF
2009
ACM
16 years 14 days ago
2009
ACM
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
172
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FCCM
2004
IEEE
15 years 9 months ago
2004
IEEE
We describe a flexible hardware encoder for regular and irregular low-density parity-check (LDPC) codes. Although LDPC codes achieve achieve better performance and lower decoding ...
200
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DASFAA
2009
IEEE
15 years 9 months ago
2009
IEEE
Abstract. Fine-grained lock protocols with lock modes and lock granules adjusted to the various XML processing models, allow for highly concurrent transaction processing on XML tre...
167
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ASPLOS
2010
ACM
16 years 24 days ago
2010
ACM
A large number of user requests execute (often concurrently) within a server system. A single request may exhibit fluctuating hardware characteristics (such as instruction comple...