87 search results - page 7 / 18 » Exploiting Postdominance for Speculative Parallelization |
IPPS
2003
IEEE
14 years 2 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
MICRO
1998
IEEE
14 years 1 months ago
1998
IEEE
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
PPOPP
2003
ACM
14 years 2 months ago
2003
ACM
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
HPCA
2002
IEEE
14 years 9 months ago
2002
IEEE
Thread-Level Speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. ...
APCSAC
2005
IEEE
14 years 2 months ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...