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PATMOS
2005
Springer
14 years 1 months ago
Improving the Memory Bandwidth Utilization Using Loop Transformations
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
Minas Dasygenis, Erik Brockmeyer, Francky Catthoor...
IPPS
2007
IEEE
14 years 2 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
ISCAPDCS
2007
13 years 9 months ago
Architectural requirements of parallel computational biology applications with explicit instruction level parallelism
—The tremendous growth in the information culture, efficient digital searches are needed to extract and identify information from huge data. The notion that evolution in silicon ...
Naeem Zafar Azeemi
IPCCC
2005
IEEE
14 years 1 months ago
Utilizing characteristics of last link to improve TCP performance
TCP, perhaps the most widely used transport protocol, was designed for wired links and stationary hosts. But more and more links with different characteristics are used to access...
Xiuchao Wu, I. Biswas, Mun Choon Chan, Akkihebbal ...
IPPS
2007
IEEE
14 years 2 months ago
Optimization and evaluation of parallel I/O in BIPS3D parallel irregular application
This paper presents the optimization and evaluation of parallel I/O for the BIPS3D parallel irregular application, a 3-dimensional simulation of BJT and HBT bipolar devices. The p...
Rosa Filgueira, David E. Singh, Florin Isaila, Jes...