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HOTI
2005
IEEE
14 years 1 months ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu
WSC
2004
13 years 9 months ago
Towards Adaptive Caching for Parallel and Discrete Event Simulation
We investigate factors that impact the effectiveness of caching to speed up discrete event simulation. Walsh and Sirer have shown that a variant of function caching (staged simula...
Abhishek Chugh, Maria Hybinette
HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
14 years 14 days ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
IPPS
2010
IEEE
13 years 6 months ago
Improving numerical reproducibility and stability in large-scale numerical simulations on GPUs
The advent of general purpose graphics processing units (GPGPU's) brings about a whole new platform for running numerically intensive applications at high speeds. Their multi-...
Michela Taufer, Omar Padron, Philip Saponaro, Sand...
CODES
2005
IEEE
14 years 1 months ago
Blue matter on blue gene/L: massively parallel computation for biomolecular simulation
This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of pro...
Robert S. Germain, Blake G. Fitch, Aleksandr Raysh...